Computer Organization

Circuit Design 1

Bit Shifters using JLS

Due: Tuesday, October 15 at 3pm


Bit shifters: details

Implement three different bit-shifting subcircuits corresponding to the MIPS operations sll, srl, and sra such that:

  1. The shifters work on 16-bit inputs meaning each shifter should have two inputs - one 16-bit data input and one 4-bit value indicating how much to shift (anywhere from 0-15 bits). Each shifter should have one 16-bit output.
  2. They are completely combinational (they require no state elements).
  3. They only use wire manipulations (bundling and unbundling) and simple logic gates (such as AND, OR, NOT, NOR, NAND, and, maybe, multiplexers). If you are not sure if you can use a component, check first.
  4. They demonstrate principles of modularity and reuse. Create auxiliary subcircuits where appropriate.
  5. You can and should work with this starter circuit. It provides a framework for you to test your bit shifters: you should replace the three placeholder subcircuits with your own sll (shift left logical), srl (shift right logical) and sra (shift right arithmetic) subcircuits.

Include a text element in your top-level circuit with your name.

Submit one JLS file (as an attachment replying to the official email announcing this assignment). Name your file as shifter_yourname.jls where yourname is either your username or the name you generally go by. (I do not care which - as long as I can easily distinguish your circuits. For example, mine could be shifter_msiff.jls or shifter_mike.jls.) The attached circuit file should consist of at least four circuits: a top-level tester circuit (essentially the starter file I have provided) and a subcircuit for sll, srl and sra. However, part of the point of the assignment is to apply principles of modularity to organize your design and reuse subcircuits.

In JLS, subcircuit reuse is schematic (as opposed to functional). You can place the same subcircuit in multiple places in your higher level circuits, but each will become a separate copy. So take care: do not modify individual copies of the same subcircuit. Test each subcircuit thoroughly before placing it higher up in your design. I recommend planning your circuit from the top down, but building it from the bottom up. Build each lower-level subcircuit in its own file before importing it in the next higher layer.

To learn more about how to bundle and unbundle wires, I recommend following the JLS Sign Extension Tutorial (available under JLS’s Help menu).

It is important to keep your diagrams as organized as possible. Keep them compact but not overcrowded. Each subcircuit should be entirely visible in the default size JLS drawing area. You may wish to use text elements to help document parts of your subcircuit.

Use the starter file to help test your circuit. Set the input constant (as a 16-bit binary number) and the shift amount constant (a 4-bit, base-10 number, so a number between 0 and 15, inclusive), and run the simulator, and examine the three 16-bit outputs to make sure the input is being correctly shifted three different ways. Be sure to test lots of combinations before submission.

Here is a picture of the top-level testing circuit in action: