Hello World! An Invitation to Computer Science

Lecture Slides

Computer Architecture and
Machine Code
Thursday, March 6, 2008

Key ideas from last time

• feedback circuits for memory
• abstraction again: zooming out
• von Neumann architecture
• stored-program concept

Registers

• small, fast memory close to action
• general purpose v. special purpose
• how many computer has varies widely

Arithmetic Logic Unit (ALU)

• addition, subtraction, comparison
• bit manipulations: logic & shifting
• several operations in parallel
• uses multiplexor to select result

Control

• cornerstone of stored-program concept:
    fetch-decode-execute cycle
    (itself an algorithm)
• updates special registers such as PC and IR
• importance of clocks, synchronous circuits

Machine language

• what are instructions? bits!
• typical format: op-codes + address/data fields
• not designed for human readability!
    still, still sometimes its useful
    that's where hexadecimal comes in handy

  binary      0011 0000 0000 1110
  hex           3    0    0    E

Architectural varieties

• computer architecture
    interface between software & hardware
• machine code formats vary widely
    according to architecture
• load-store: ALU operates on registers only
• accumulator one register - always implicit
• RISC v. CISC (better idea doesn't always win!)

Instruction categories

• data transfer: between CPU and memory
    load, store, move
• arithmetic: usually on CPU only (but not always!)
• comparison: sets special condition registers
    (some machines do this differently)
• control: conditional branches and jumps

Machine instructions v. pseudocode

• primitive ops - can correspond to single instructions
• conditionals - to some kind of branch
• pseudocode: much more readable and compact
• what about loops?

if we can do all three, we can
  execute any algorithm at machine level

Example: 2 + 4 = 6

 addr       data          hex   op     meaning
 ---------------------------------------------
 000   0000000000000101   0005  LOAD   R ← CON(5)
 001   0011000000000110   3006  ADD    R ← R + CON(6)
 010   0001000000000111   1007  STORE  CON(7) ← R
 011   1110000000000111   E007  OUT    display CON(7)
 100   1111000000000000   F000  HALT   
 101   0000000000000010   0002
 110   0000000000000100   0004
 111   0000000000000000   0000

Example: 1 + 2 + ... + n

  0  LOAD i
  1  COMPARE n
  2  JUMPLT ...
  3  LOAD sum
  4  ADD i
  5  STORE sum
  6  INCREMENT i
  7  JUMP 0
  8  OUT sum
  9  HALT